Enabling the next phase of Moore’s Law through optical connectivity

Ayar Labs solves the I/O bandwidth and power bottlenecks by moving data using light.

The 10 Hottest Semiconductor Startups Of 2020

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Dramatically improving I/O performance at lower power

Enabling new system architectures and topologies

Improving resiliency and reach

Request your Optical I/O Starter Kit Today

Become a part of the I/O revolution and begin evaluating optical I/O for your next generation SoC architectures now with the Ayar Labs Optical I/O Starter Kit.  The kit includes everything you need and can be customized to meet your product requirements.

The Latest Business and Product Developments at Ayar Labs

Ayar Labs is disrupting the traditional performance, cost, and efficiency curves of the semiconductor and computing industries by delivering a 1000x improvement in interconnect bandwidth density at 10x lower power. We use standard CMOS processing to develop high-speed, high-density, low-power optical interconnect “chiplets” and lasers to replace traditional electrical I/O.

Optical I/O for HPC & AI

Solution Brief:

Paradigm Change: Reinventing HPC Architectures with In-Package Optical I/O

Even with the first exascale systems just around the corner, HPC centers are already wrestling with what technologies will provide the next level of compute performance, bandwidth and memory to continue to advance their science.

Learn how Ayar Labs In-Package Optical I/O technologies are reinventing HPC Architectures that will enable HPC centers to continue to push boundaries for HPC and AI.

Webinar:

Disaggregated Architectures for Next Generation HPC and AI Workloads

This webinar brings together thought leaders working across government, industry and academia who are building and exploring disaggregated architectures and the technologies that enable them. Explore the promise and challenges of building HPC architectures of the future!

CW-WDM MSA

Announcing a new industry consortium dedicated to defining specifications for multi-wavelength advanced integrated optics.

Learn more about the CW-WDM MSA →

Optical I/O Takes a Major Step Forward

PIPES Researchers from Ayar Labs and Intel Demonstrate Optical Interconnects to Improve Performance of Digital Microelectronics

See how optical chips can be pushed directly into the CPU/GPU/ASIC package, enabling next-gen computer architectures

Learn how Ayar Labs is breaking optical I/O milestones while adjusting to the ‘new normal’ in our latest blog post

Miss us at Hot Chips 2019?

President, Chief Scientist, and Co-Founder, Mark Wade presented Ayar Labs’ mission, product strategy, and collaboration with Intel. 

Intel and Ayar Labs demonstrated the industry’s first integration of monolithic in-package optics (MIPO) with a high-performance system-on-chip (SOC) co-packaged with the Intel Stratix 10 FPGA.

Recent Announcements

In the Media

Latest Resources

In-Package Optical I/O: On the Cusp of High Volume Manufacturing

Ayar Labs has successfully demonstrated the first ultra-dense optical interconnect solution on GLOBALFOUNDRIES’ next generation silicon photonics manufacturing process.  With this demonstration, we're showing that optical I/O is ready to be manufactured in high...

In-Package Optical I/O: On the Cusp of High Volume Manufacturing

Ayar Labs has successfully demonstrated the first ultra-dense optical interconnect solution on GLOBALFOUNDRIES’ next generation silicon photonics manufacturing process.  With this demonstration, we're showing that optical I/O is ready to be manufactured in high...

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