Enabling the next phase of Moore’s Law through optical connectivity
Ayar Labs solves the I/O bandwidth and power bottlenecks by moving data using light.
Optical I/O Takes a Major Step Forward
PIPES Researchers from Ayar Labs and Intel Demonstrate Optical Interconnects to Improve Performance of Digital Microelectronics
See how optical chips can be pushed directly into the CPU/GPU/ASIC package, enabling next-gen computer architectures
Learn how Ayar Labs is breaking optical I/O milestones while adjusting to the ‘new normal’ in our latest blog post
Ayar Labs is disrupting the traditional performance, cost, and efficiency curves of the semiconductor and computing industries by delivering a 1000x improvement in interconnect bandwidth density at 10x lower power. We use standard CMOS processing to develop high-speed, high-density, low-power optical interconnect “chiplets” and lasers to replace traditional electrical I/O.
Industry Verticals
Technical Brief: Optical I/O Chiplets Eliminate Bottlenecks to Unleash Innovation
This technical brief examines the evolution of optical communications in computing systems and the transition to ‘Phase Two’ of Moore’s Law through monolithic in-package optical I/O (MIPO I/O).
Download this technical brief to learn how Ayar Labs TeraPHY™ MIPO I/O Chiplets are enabling better bandwidth and better latency chip to chip communications at lower power.
Miss us at Hot Chips 2019?
President, Chief Scientist, and Co-Founder, Mark Wade presented Ayar Labs’ mission, product strategy, and collaboration with Intel.
Intel and Ayar Labs demonstrated the industry’s first integration of monolithic in-package optics (MIPO) with a high-performance system-on-chip (SOC) co-packaged with the Intel Stratix 10 FPGA.
Recent Announcements
PIPES Researchers Demonstrate Optical Interconnects to Improve Performance of Digital Microelectronics
Researchers replace traditional electronic I/O with optical signaling interfaces to achieve major improvements in link reach and efficiencyUnder DARPA’s Photonics in the Package for Extreme Scalability (PIPES) program, researchers from Intel and Ayar Labs have...
In the Media
Global Foundries Blog | Silicon Photonics: A Marriage of Optical and Digital on GF’s RF Process
GLOBALFOUNDRIES and SiPh startup Ayar Labs have been collaborating since 2016 on a monolithic solution for in-package optical interconnects “It requires a very delicate balance to have the photonics and the RF CMOS circuits on the same chip. By integrating it all into...
Latest Resources
Ayar Labs: Solving Critical Computing Challenges through Optical I/O
Discover how our optical I/O solution will solve the critical computing challenges of efficiency, density, and distance for next-gen system architectures.
Technical Brief: Optical I/O Chiplets Eliminate Bottlenecks to Unleash Innovation
This technical brief examines the evolution of optical communications in computing systems and the transition to ‘Phase Two’ of Moore’s Law through monolithic in-package optical I/O (MIPO I/O). Trends Driving Monolithic In-Package Optical Input/Output Chiplets...
Ayar Labs TeraPHY™ MIPO I/O Chiplet: Enhancing state of the art, advanced architectures
More resources from Ayar Labs:
Ayar Labs: Solving Critical Computing Challenges through Optical I/O
Discover how our optical I/O solution will solve the critical computing challenges of efficiency, density, and distance for next-gen system architectures.