Enabling the next phase of Moore’s Law through optical connectivity
Ayar Labs solves the I/O bandwidth and power bottlenecks by moving data using light.
Optical I/O Takes a Major Step Forward
PIPES Researchers from Ayar Labs and Intel Demonstrate Optical Interconnects to Improve Performance of Digital Microelectronics
See how optical chips can be pushed directly into the CPU/GPU/ASIC package, enabling next-gen computer architectures
Learn how Ayar Labs is breaking optical I/O milestones while adjusting to the ‘new normal’ in our latest blog post
Ayar Labs is disrupting the traditional performance, cost, and efficiency curves of the semiconductor and computing industries by delivering a 1000x improvement in interconnect bandwidth density at 10x lower power. We use standard CMOS processing to develop high-speed, high-density, low-power optical interconnect “chiplets” and lasers to replace traditional electrical I/O.
Industry Verticals
Technical Brief: Optical I/O Chiplets Eliminate Bottlenecks to Unleash Innovation
This technical brief examines the evolution of optical communications in computing systems and the transition to ‘Phase Two’ of Moore’s Law through monolithic in-package optical I/O (MIPO I/O).
Download this technical brief to learn how Ayar Labs TeraPHY™ MIPO I/O Chiplets are enabling better bandwidth and better latency chip to chip communications at lower power.
Miss us at Hot Chips 2019?
President, Chief Scientist, and Co-Founder, Mark Wade presented Ayar Labs’ mission, product strategy, and collaboration with Intel.
Intel and Ayar Labs demonstrated the industry’s first integration of monolithic in-package optics (MIPO) with a high-performance system-on-chip (SOC) co-packaged with the Intel Stratix 10 FPGA.
Recent Announcements
PIPES Researchers Demonstrate Optical Interconnects to Improve Performance of Digital Microelectronics
Researchers replace traditional electronic I/O with optical signaling interfaces to achieve major improvements in link reach and efficiencyUnder DARPA’s Photonics in the Package for Extreme Scalability (PIPES) program, researchers from Intel and Ayar Labs have...
In the Media
Lockheed backs optical interconnects with Ayar Labs investment
Ayar Labs, a Silicon Valley startup with the stated aim of “enabling the next phase of Moore’s law through optical connectivity”, says it has received strategic investment from the venture wing of the giant US military contractor Lockheed Martin. Without disclosing...
Latest Resources
Technical Brief: Optical I/O Chiplets Eliminate Bottlenecks to Unleash Innovation
This technical brief examines the evolution of optical communications in computing systems and the transition to ‘Phase Two’ of Moore’s Law through monolithic in-package optical I/O (MIPO I/O). Trends Driving Monolithic In-Package Optical Input/Output Chiplets...
TeraPHY: A Chiplet Technology for Low-Power, High-Bandwidth In-Package Optical I/O
Abstract: This slide deck was presented by Mark Wade on August 20, 2019. (48 slides) Authors: Ayar Labs - Dr. Mark Wade, Erik Anderson, Dr. Shahab Ardalan, Pavan Bhargava, Sidney Buchbinder, Dr. Michael Davenport, Dr. John Fini, Dr. Anatoly Khilo, Roy Meade, Dr....
TeraPHY: A High-density Electronic-Photonic Chiplet for Optical I/O from a Multi-Chip Module
In this work, we provide an overview of System-in-Package (SiP) integration of an electronic-photonic chiplet fabricated in a commercial CMOS foundry. Assembly considerations, including co-packaging in a standard multi-chip module (MCM) package with a System-on-Chip (SoC), thermals, and fiber attach will be reviewed.
Technical Brief: Optical I/O Chiplets Eliminate Bottlenecks to Unleash Innovation
This technical brief examines the evolution of optical communications in computing systems and the transition to ‘Phase Two’ of Moore’s Law through monolithic in-package optical I/O (MIPO I/O). Trends Driving Monolithic In-Package Optical Input/Output Chiplets...