Enabling the next phase of Moore’s Law through optical connectivity
Ayar Labs solves the I/O bandwidth and power bottlenecks by moving data using light.
Ayar Labs is disrupting the traditional performance, cost, and efficiency curves of the semiconductor and computing industries by delivering a 1000x improvement in interconnect bandwidth density at 10x lower power. We use standard CMOS processing to develop high-speed, high-density, low-power optical interconnect “chiplets” and lasers to replace traditional electrical I/O.
Industry Verticals
Technical Brief: Optical I/O Chiplets Eliminate Bottlenecks to Unleash Innovation
This technical brief examines the evolution of optical communications in computing systems and the transition to ‘Phase Two’ of Moore’s Law through monolithic in-package optical I/O (MIPO I/O).
Download this technical brief to learn how Ayar Labs TeraPHY™ MIPO I/O Chiplets are enabling better bandwidth and better latency chip to chip communications at lower power.
Miss us at Hot Chips 2019?
President, Chief Scientist, and Co-Founder, Mark Wade presented Ayar Labs’ mission, product strategy, and collaboration with Intel.
Intel and Ayar Labs demonstrated the industry’s first integration of monolithic in-package optics (MIPO) with a high-performance system-on-chip (SOC) co-packaged with the Intel Stratix 10 FPGA.
The Latest on Ayar Labs
Dr. Ken Chang Joins Ayar Labs Executive Leadership Team as Senior Vice President of Engineering
SANTA CLARA, CA, December 17, 2019 – Ayar Labs is pleased to announce that Dr. Ken Chang, former VP of Wired Engineering at Xilinx, has joined as Senior Vice President of Engineering. Dr. Chang joins Ayar after nine years at Xilinx where he led its SerDes technology...
On-Chip Optical Links Are One Step Closer To Reality
Ayar Labs looks like it is just about ready to put its optical I/O chiplet technology into commercial datacenter products. A presentation at the recent Hot Chips conference revealed a lot more detail about Ayar’s technology than it has have offered in the past, while...
Ayar Labs and Intel add optical input-output to an FPGA
Intel has teamed with several partners in addition to Ayar Labs for its FPGA-based silicon-in-package design, part of the US Defense Advanced Research Projects Agency’s (DARPA) project. Ayar Labs used the Hot Chips conference, held in Palo Alto, California in August,...