Enabling the next phase of Moore’s Law through optical connectivity
Ayar Labs solves I/O bandwidth and power bottlenecks by moving data using light.
Revolutionizing Chip-to-Chip Communication
Ayar Labs is disrupting the traditional performance, cost, and efficiency curves of the semiconductor and computing industries by delivering up to a 1000x improvement in interconnect bandwidth density at one-tenth the power. We use standard CMOS processing to develop high-speed, high-density, low-power optical interconnect “chiplets” and lasers to replace traditional electrical I/O.
Cloud
→ Disaggregated architectures
→ Glue-less interconnects
→ Memory semantic fabrics
AI/HPC
→ Chip-chip low latency
→ Bandwidth
→ HBM capacity
Connectivity
→ Disaggregated base stations
→ RF-optical I/O
→ Digital beam forming
Intelligent Edge
→ RF sensing
→ Phased array radar
→ AI at the edge
Ayar Labs: Solving Data Bottlenecks with Optical I/O
Ayar Labs is solving the critical performance bottlenecks in computing systems with optical I/O. By moving data between computer chips using light instead of electricity, systems achieve a dramatic leap in performance and latency with much lower power.
In-Package Optical I/O: Unleashing Innovation
Discover how Ayar Labs’ optical I/O solution is the key to unleashing innovation in AI, scaling cloud and HPC, launching new aerospace systems, enabling the next wave of 5G, and more.
Disaggregated System Architectures with Optical I/O
In-Package Optical I/O Will Unleash the Full Potential of AI
Ayar Labs’ Optical I/O Enables Disaggregated Architectures for Cloud, AI, and HPC
Recent Announcements
Ayar Labs to Accelerate Development and Application of Optical Interconnects in Artificial Intelligence/Machine Learning Architectures with NVIDIA
Ayar Labs, the leader in chip-to-chip optical connectivity, is developing with NVIDIA groundbreaking artificial intelligence (AI) infrastructure based on optical I/O technology to meet future demands of…
In the Media
Ayar Labs Bets on Optical I/O for Next-Gen Computing
As the dreams of artificial intelligence and machine-learning system developers have grown ever larger, the suppliers of hardware to enable those systems have started to bump up against some fundamental constraints. For example, Nvidia—a leader in graphics processing...
Latest Resources
HPE and Ayar Labs: Ushering in a New Era of Innovation with Silicon Photonics
Justin Hotard, EVP and General Manager of HPC and AI at Hewlett Packard Enterprise, and Charles Wuischpard, CEO of Ayar Labs share their perspectives on the strategic collaboration between the two companies to design future silicon photonics solutions for HPE...
Optical Interconnects for Future Advanced Antenna Systems: Architectures, Requirements and Technologies
This technical paper aims to give an outlook of future advanced antenna systems for 5G and 6G wireless networks. The trend to increase the peak data rate and to reduce latency and power consumption will continue in the future.
Webinar: Advanced Memory Architectures to Overcome Bandwidth Bottlenecks for the Exascale Era of Computing
A key barrier to unlocking future system performance is overcoming the bandwidth bottlenecks that limit inter-processor and memory performance. Current solutions, such as HBM and DDR5, are constrained because of thermal and signal integrity issues. New HPC and AI...
Technical Brief: Optical I/O Chiplets Eliminate Bottlenecks to Unleash Innovation
This technical brief examines the evolution of optical communications in computing systems and the transition to ‘Phase Two’ of Moore’s Law through in-package optical I/O (OIO). Trends Driving In-Package Optical I/O Chiplets Electrical I/O Barriers to High-Performance...