Ayar Labs has developed the first monolithic, in-package optical I/O chiplet that eliminates the bottlenecks in...
Resources
Unleashing Opportunities with Optical I/O for the Aerospace Industry
Tasked with maintaining a competitive footing worldwide, aerospace and defense organizations are increasingly...
Silicon Photonics and Heterogeneous Integration Challenges
In this recorded presentation, Roy Meade, VP of Manufacturing at Ayar Labs, shares how materials engineering can...
75% Efficient Wide Bandwidth Grating Couplers in a 45 nm Microelectronics CMOS Process
In this paper, we demonstrate a highly directional vertical grating coupler with > 70% chip-to-fiber coupling efficiency (CE) and a 78 nm 1- dB bandwidth fabricated in a 45 nm commercially available microelectronics SOI CMOS process.
A Monolithically-Integrated Chip-to-Chip Optical Link in Bulk CMOS
A silicon-photonic link is monolithically-integrated in a bulk CMOS process for the first time.
Energy-Efficient Active Photonics in a Zero-Change, State-of-the-Art CMOS Process
Based on a novel, “spoked-ring” active microcavity, we demonstrate optical modulators in an unmodified 45nm SOI CMOS process at 5Gbps with <5fJ/bit energy consumption; and filters with record thermal tuning efficiency of 2µW/GHz.