CMOS Plus On-Chip Electro-Optical Interconnect Zooms Past 2 Tb/s
A highly advanced management of electronics, CMOS, and optical physics is pushing system-in-package designs past the terabit-per-second boundary in this DARPA-sponsored project with Ayar Labs and Intel.
What you’ll learn
- DARPA, Intel, and Ayar Labs collaborate on developing 100-Tb/s-plus in-package silicon photonic interfaces.
- Ayar’s TeraPHY chiplet combines silicon photonics and CMOS in a flip-chip SiP.
- Thermal analysis revealed a method to handle the TeraPHY’s dissipation issue.
