The Microelectronics Packaging and Test Engineering Council (MEPTEC) is hosting an in-person symposium on Wednesday, November 29, 2023 to explore the challenges faced in creating a robust heterogeneous integration (HI) ecosystem. We will have speakers from throughout the semiconductor industry to help answer: What else can roadmaps do? How do we address the fundamentally different situation of heterogeneous integration compared to silicon nodes? Can we converge on a manageable set of standards, and what should be the scope of those standards? What other collaborative mechanisms will help the ecosystem? Given the collaborative approach needed to address the challenges, MEPTEC is very pleased to be presenting this as an in-person event.  See you there!

Ayar Labs at MEPTEC Road to Chiplets — Ecosystems 2023

LK Bhupathi, Ayar Labs VP of Products, Strategy, and Ecosystem, will present:
Optical I/O Chiplets — Market Needs and Ecosystem Dynamics  

As package-level integration is delivering scaled-up performance, the need to scale out beyond one package is driving the need for a new high-throughput, low-latency, and power-efficient optical I/O chiplet solution. Compute and memory capabilities inside a package have achieved performance upgrades via stitching together multiple compute die and HBM stacks. Standards like UCIe and BoW will only accelerate this trend. Bringing optical I/O chiplets into the package offers tremendous opportunities to deliver on the next wave of computing architectures as well as challenges to the ecosystem.