IEEE Hot Interconnects is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from multi-core on-chip interconnects to those within systems clusters, and data centers. Leaders in industry and academia attend the conference to interact with individuals at the forefront of this field.
Since it started in 1989, HOT CHIPS has been known as one of the semiconductor industry’s leading conferences on high-performance microprocessors and related integrated circuits. The conference is held once a year in August in the center of the world’s capital of electronics activity, Silicon Valley. The HOT CHIPS conference typically attracts more than 500 attendees from all over the world. It provides an opportunity for chip designers, computer architects, system engineers, press and analysts, as well as attendees from national laboratories and academia to mix, mingle and see presentations on the latest technologies and products. The three days of the conference typically feature two tutorials, two keynotes, a panel discussion and around 25 presentations on a variety of subjects related to microprocessors and integrated circuits. It is widely covered by the media; last year, we had about 25 members of the industry and national press covering the conference. The conference emphasis this year, as in previous years, is on real products and realizable technology. Submissions are invited from a variety of “hot” topics, including embedded and reconfigurable processors, quantum computing, nano structures, wireless chips, network/security processors, advanced packaging technology etc. For a complete list of topics, refer to the […]
GF Technology Summit (GTS) 2023 is GlobalFoundries’ worldwide, annual series of technology-focused events. GTS brings together leaders from the commercial, business and research worlds to understand the latest technology challenges and opportunities, and partner to create the most innovative applications and solutions. GTS 2023 Highlights This year's GTS will focus on GF's industry and technology differentiation, highlighted by three key areas of innovation: Power, power, power — Ultra-low power technology platforms and applications, power management and power delivery solutions Best RF wins — RF and mmWave connectivity solutions for mobile and infrastructure applications Intelligence & security — Localized, low-power intelligent applications with secure eNVM GF's market-focused development includes partnerships across the broad electronics ecosystem — OEM, fabless, OSAT, EDA, and IP. The results of those collaborations will be seen and heard in the guest keynote addresses, detailed technology roadmaps, hardware and software demonstrations, and leading applications for automotive, IoT, smart mobile, datacenter, and communications infrastructure markets. GTS 2023 Program Ayar Labs at GTS 2023 AI Everywhere—Datacenter & Communications Infrastructure Day 2, August 30, 2023 9:00 AM – 1:00 PM Program Ayar Labs’ CTO Mark Wade will chat with GlobalFoundries’ Hiren Majmuder and Anthony Yu about the impact of silicon photonics on next-gen high-performance applications […]
Europe’s leading conference on optical communications is one of the most prestigious and long-standing events worldwide. In the historic and vibrant city of Glasgow, ECOC will showcase the latest cutting-edge developments in optical communication and an exciting social program allowing delegates to network and share ideas while experiencing the best Scottish culture. The ECOC exhibition covers a wide range of optical communication products and services parallel to the scientific conference.
OCP/ODSA 2023 Technical Workshop on Die-to-Die (D2D) Interfaces October 16, 2023 Hosted by Carnegie Mellon University Silicon Valley The aim of this workshop is a technical deep dive into D2D PHYs to help PHY developers and customers objectively analyze D2D PHYs across vendors and standards. The workshop agenda will cover standards, D2D PHY IP, Optical D2D, D2D application, and a PHY customer panel. The workshop will also feature a discussion session to aim to develop a common set of metrics (and a corresponding measurement/reporting methodology) to characterize D2D PHYs. Optical PHYs: Ayar Labs, Enosemi, and Intel Nhat Nguyen, Sr. Director of Solutions Architecture in CTO Office, Ayar Labs As part of the Optical PHYs discussion, Nhat Nguyen will present performance metrics for Ayar Labs' optical I/O solutions along with target application areas. The complete solutions consist of TeraPHY™ chiplets, which are fully integrated electro-optical transceivers, and SuperNova™ modules, which are multi-wavelength light sources. Full Agenda Registration
Denver is the place to be this fall as the high performance computing community convenes for an exhilarating week of sessions, speakers, and networking at its finest. SC is an unparalleled mix of thousands of scientists, engineers, researchers, educators, programmers, developers, and system administrators who intermingle to learn, share, and grow. Visit Ayar Labs at booth #228!
The Microelectronics Packaging and Test Engineering Council (MEPTEC) is hosting an in-person symposium on Wednesday, November 29, 2023 to explore the challenges faced in creating a robust heterogeneous integration (HI) ecosystem. We will have speakers from throughout the semiconductor industry to help answer: What else can roadmaps do? How do we address the fundamentally different situation of heterogeneous integration compared to silicon nodes? Can we converge on a manageable set of standards, and what should be the scope of those standards? What other collaborative mechanisms will help the ecosystem? Given the collaborative approach needed to address the challenges, MEPTEC is very pleased to be presenting this as an in-person event. See you there! Ayar Labs at MEPTEC Road to Chiplets — Ecosystems 2023 LK Bhupathi, Ayar Labs VP of Products, Strategy, and Ecosystem, will present: Optical I/O Chiplets — Market Needs and Ecosystem Dynamics As package-level integration is delivering scaled-up performance, the need to scale out beyond one package is driving the need for a new high-throughput, low-latency, and power-efficient optical I/O chiplet solution. Compute and memory capabilities inside a package have achieved performance upgrades via stitching together multiple compute die and HBM stacks. Standards like UCIe and BoW will only accelerate this […]
DesignCon is the premier high-speed communications and system design conference and exposition, offering industry-critical engineering education in the heart of electronics innovation — Silicon Valley. Ayar Labs at DesignCon 2024 Panel Discussion: Optics Innovation Challenges & Opportunities: Unleashing Datacom Efficiency & Bandwidth Thursday, February 1 4:00 – 5:15 PM PST Ballroom B As datacenters continue to face increasing demand for efficiency and bandwidth, especially with the adoption of AI and ML techniques, optics has a promising role in the evolving architecture and performance of future interconnects backed by growing investment in innovative optoelectronic IC integration and co-packaged optics (CPOs) solutions. This panel will bring photonic industry experts together for a well-rounded discussion about where, when, and how optical technologies can be used in meeting the growing performance and efficiency demands of datacenters. The panel will also discuss trends and opportunities in the field, such as heterogeneous integration, co-design considerations for electro-optical systems, and packaging. Panelists include Matt Sysak, Ayar Labs VP, Laser & Platform Engineering, as well as representatives from Ansys, Broadcom, Cisco, Intel, Lightmatter, and NVIDIA.
The International Solid-State Circuits Conference (ISSCC) is the foremost global forum for presentation of advances in solid-state circuits and systems-on-a-chip. The conference offers a unique opportunity for engineers working at the cutting edge of IC design and application to maintain technical currency, and to network with leading experts. ISSCC 2024 Program ISSCC 2024 Registration Ayar Labs at ISSCC Forum 1 Efficient Chiplets and Die-to-Die Communications Sunday, February 18, 2024 8:00 AM – 5:00 PM Maturation of 2.xD/3D technologies has triggered a revolution in computing through chiplet-based heterogeneous integration of disparate process technologies and computing architectures. This forum will feature expert technologists and architects who will describe the SotA and the future trends for technology, heterogeneous computing architectures and chip-to-chip communications, covering the whole spectrum of challenges from protocol definitions to emerging technologies, circuit design and test. Photonics for Die-to-Die Interconnects: Links and Optical I/O Chiplets Sunday, February 18, 2024 3:15 – 4:00 PM Chen Sun VP Silicon Engineering and Co-Founder Ayar Labs