ON-DEMAND WEBINAR:
Next-Gen AI Architecture Through Co‑Packaged Optics

But technology readiness is only one piece of the puzzle. In this webinar, industry leaders from Alchip, Astera Labs, and Ayar Labs move beyond proof-of-concept to address the manufacturing, supply chain, and integration realities of commercial CPO deployment.
Join this expert panel as they decode the three-stage silicon photonics roadmap (scale-out → scale-up → extended memory), explore how the scale-out ecosystem is proving out CPO for the higher-stakes scale-up market, and provide specific guidance on deployment timelines from 2026 through 2028.
Discover why technology maturation is ahead of packaging flows and supply chain readiness, how hyperscalers will balance customization with multi-sourcing requirements, and why software-defined telemetry and rack-level integration strategies are as critical as the optical chiplet itself. Learn what barriers must fall before CPO achieves the volumes AI demands and who will cross the finish line first.
Key Takeaways
- Architecting XPU clusters that behave like one giant chip across racks
- The three pillars of CPO readiness
- Meeting the engineering requirements for 100Tb/s+ XPU-to-XPU connectivity
- Solving the power and latency challenges of 100MW+ AI factories
- The economic tipping points driving CPO adoption from 2026-2028
- Manufacturing at AI scale
- Standardization vs. customization paradox
Fill out this form to watch the webinar video.
Speakers
Moderator
Timothy Prickett Morgan
Co-Editor
The Next Platform
Panelists
Erez Shaizaf
CTO
Alchip
Adit Narasimha
VP/GM, Emerging Technologies
Astera Labs
Vladimir Stojanovic
CTO and Co-Founder
Ayar Labs
Contact us at [email protected] to learn more.