TeraPHY™ Optical I/O Chiplet

The First Monolithic In-Package Optical I/O Chiplet

TeraPHY chiplet

Unleash the Next Wave of Innovation with TeraPHY™ Optical I/O

TeraPHY™ optical I/O chiplets disrupt the traditional performance, cost, and efficiency curves of the semiconductor and computing industries. Combining silicon photonics with standard CMOS manufacturing processes, TeraPHY™ delivers up to 1000x bandwidth density improvements at 1/10th the power compared to electrical I/O.

This combination of performance and efficiency enables ASICS to communicate with each other across a wide range of distances, from millimeters up to two kilometers.

TeraPHY™ is unlocking the full promise of artificial intelligence and next-generation disaggregated system designs.

TeraPHY™: A High-density Electronic-Photonic Chiplet

The TeraPHY™ optical I/O chiplet is a small-footprint, low power, high-throughput alternative to copper backplane and pluggable optics communications. Combined with the Ayar Labs SuperNova multi-wavelength laser, TeraPHY™ drives tens of Tbps of bandwidth directly out of an ASIC/CPU/FPGA package. TeraPHY’s modular multiport design can carry eight light channels (the equivalent of an x8 PCIe gen5 link).

Key Features*

Power Efficiency
Less than 5pJ/b
5ns per chiplet + TOF
Bandwidth & Density
In excess of 200 Gbps/mm
Package to package connections from mm up to 2 km

*Full roadmap and technical details available under NDA

TeraPHY™ ushers in an era of truly universal I/O – delivering terabit data rates from die-to-die and across data centers at only a fraction of the power for cost-effective, faster, and more flexible system designs.

Technical Features

  • Parallel electrical interface
  • Supports AIB and other proprietary parallel interfaces
  • 8 full-duplex optical ports
  • 8 WDM transceiver slices per optical port
  • Configurable up to 256 Gb/s per port (2 Tb/s per chiplet)
  • NRZ modulation format on the optical port — no Forward Error Correction (FEC) required
  • Configurable crossbar to map electrical channels to optical ports
  • Energy efficiency < 5 pJ/bit

Monolithic In-Package Optical I/O

MCP Diagram

A look inside the TeraPHY™ In-package optical I/O Chiplet…

TeraPHY™ Applications


→ Disaggregated Architectures

→ Glue-less interconnects

→ Memory semantic fabrics


→ Chip-Chip low latency

→ Bandwidth

→ HBM Capacity


→ Disaggregated base stations

→ RF-Optical I/O

→ Digital Beam Forming

Intelligent Edge

→ RF Sensing

→ Phased Array Radar

→ AI at the edge


Webinar: Meeting the Bandwidth Demands of Next-Gen HPC & AI System Architectures

In artificial intelligence (AI), increasingly complex algorithms, larger datasets, and process-intensive workloads lend to an insatiable demand for compute, memory, and storage, as well as higher-bandwidth, lower-latency communication between these components.

Webinar: Scalable and Sustainable AI: Rethinking Hardware and System Architecture

Join us as we unravel the challenges in existing hardware and system architectures, showcasing innovations that bolster AI’s efficiency, scalability, and sustainability.

Ayar Labs Optical I/O: Shattering the Barriers to AI at Scale

Generative AI is enabling transformative outcomes, but model complexity is growing exponentially. Traditional interconnects create a bottleneck for data, forcing GPUs to remain idle a majority of the time.

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